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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10860525 B1

PDFFull Text
Date of Patent:
Dec. 08, 2020

Filed:

Apr. 09, 2020

Monolithically integrated system on chip for silicon photonics

Applicant:

Inphi Corporation, Santa Clara, CA (US);

Inventors:

Radhakrishnan L. Nagarajan, Santa Clara, CA (US);

Chao Xu, Thousand Oaks, CA (US);

Assignee:

INPHI CORPORATION, San Jose, CA (US);

Attorneys:

Richard T. Ogawa

Ogawa P.C.

Primary Examiner:

David E Martinez

Int. Cl.
CPC ...
G06F 13/24 (2006.01); H04B 10/80 (2013.01); H04B 10/40 (2013.01); H04B 10/556 (2013.01); H04B 10/54 (2013.01); H04B 10/516 (2013.01); H04B 10/69 (2013.01); H04B 14/02 (2006.01); G06F 15/78 (2006.01); G06F 13/42 (2006.01); G02B 6/12 (2006.01); H04L 27/00 (2006.01); G06F 13/364 (2006.01); G06F 13/40 (2006.01); H04L 1/00 (2006.01); H04L 25/03 (2006.01); H04L 5/14 (2006.01); H04L 27/02 (2006.01); H04L 27/18 (2006.01); H04L 27/34 (2006.01);
U.S. Cl.
CPC ...
G06F 15/7817 (2013.01); G02B 6/12004 (2013.01); G06F 13/364 (2013.01); G06F 13/4072 (2013.01); G06F 13/42 (2013.01); G06F 13/4282 (2013.01); H04L 1/0003 (2013.01); H04L 25/03006 (2013.01); H04L 27/0008 (2013.01); G02B 2006/12061 (2013.01); G02B 2006/12097 (2013.01); G02B 2006/12121 (2013.01); G02B 2006/12123 (2013.01); G02B 2006/12142 (2013.01); H04L 5/14 (2013.01); H04L 25/03343 (2013.01); H04L 27/02 (2013.01); H04L 27/18 (2013.01); H04L 27/34 (2013.01);
Abstract

The present invention includes an integrated system-on-chip device configured on a substrate member. The device has a data input/output interface provided on the substrate member and configured for a predefined data rate and protocol. The device has an input/output block provided on the substrate member and coupled to the data input/output interface. The input/output block comprises a SerDes block, a CDR block, a compensation block, and an equalizer block. The SerDes block is configured to convert a first data stream of N having a first predefined data rate at a first clock rate into a second data stream of M having a second predefined data rate at a second clock rate. The device has a driver module provided on the substrate member and coupled to a signal processing block, and a driver interface provided on the substrate member and coupled to the driver module and a silicon photonics device.

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