The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 2020

Filed:

Dec. 28, 2016
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Michael Ivan Thompson, Colfax, CA (US);

Murthy Kompella, Roseville, CA (US);

Joseph Harold Steinmetz, Loomis, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/28 (2006.01); G06F 13/40 (2006.01); G06F 13/16 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4027 (2013.01); G06F 13/1605 (2013.01); G06F 13/28 (2013.01); G06F 13/4282 (2013.01); G06F 2213/0026 (2013.01);
Abstract

The current document is directed to a family of integrated hardware controllers that provides for cost-effective, high-bandwidth, and scalable incorporation of SSDs into large, distributed-computer systems. Certain implementations of the integrated hardware controller include dual media-access controllers for connection to one or more local area networks, remote-direct-memory-access ('RDMA') controllers for supporting RDMA protocols over the local area network, an NVMe controller that provides access to an SSD. In certain integrated-hardware-controller implementations, the RDMA and NVMe controllers are implemented in one of a field programmable gate array ('FPGA') and application-specific integrated circuit (“ASIC”).


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