The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 08, 2020
Filed:
Feb. 21, 2018
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Markus Kahn, Rangersdorf, AT;
Anna-Katharina Kaiser, Regen, DE;
Soenke Pirk, Villach, AT;
Juergen Steinbrenner, Noetsch, AT;
Julia-Magdalena Straeussnigg, Villach, AT;
Assignee:
INFINEON TECHNOLOGIES AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B81C 1/00 (2006.01); H04R 31/00 (2006.01); H04R 19/00 (2006.01); H04R 19/04 (2006.01);
U.S. Cl.
CPC ...
B81C 1/00801 (2013.01); H04R 19/005 (2013.01); H04R 19/04 (2013.01); H04R 31/00 (2013.01); B81C 2201/0133 (2013.01); B81C 2201/0176 (2013.01); B81C 2201/053 (2013.01); B81C 2201/056 (2013.01); H04R 2201/003 (2013.01);
Abstract
A semiconductor device comprises a structured metal layer. The structured metal layer lies above a semiconductor substrate. In addition, a thickness of the structured metal layer is more than 100 nm. Furthermore, the semiconductor device comprises a covering layer. The covering layer lies adjacent to at least one part of a front side of the structured metal layer and adjacent to a side wall of the structured metal layer. In addition, the covering layer comprises amorphous silicon carbide.