The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 2020

Filed:

Mar. 14, 2019
Applicant:

Anokiwave, Inc., San Diego, CA (US);

Inventors:

Robert McMorrow, Concord, MA (US);

Vipul Jain, San Diego, CA (US);

Mikhail Shirokov, Burlington, MA (US);

Kevin B. Greene, Cambridge, MA (US);

Susanne A. Paul, Austin, TX (US);

Shamsun Nahar, San Diego, CA (US);

Assignee:

ANOKIWAVE, INC., San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 17/13 (2015.01); H04B 7/06 (2006.01); H04B 17/10 (2015.01); H04B 17/00 (2015.01); H04B 17/12 (2015.01);
U.S. Cl.
CPC ...
H04B 17/13 (2015.01); H04B 17/0085 (2013.01); H04B 17/102 (2015.01); H04B 17/12 (2015.01);
Abstract

A system and a method for calibrating an antenna using trim bits and non-volatile memory is disclosed. In one aspect, an apparatus includes a power amplifier configured to at least amplify the output signal of the first antenna. The power amplifier includes multiple stages. The apparatus further includes a trim control circuit configured to adjust a bias of one of the stages of the power amplifier, using trim bits from non-volatile memory. The trim control circuit is further configured to scale the bias of one of the plurality of stages of the power amplifier by an integer between 0 and 2−1 corresponding to a binary number formed by the first plurality of trim bits, wherein n corresponds to the number of trim bits.


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