The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 2020

Filed:

Mar. 07, 2016
Applicant:

Kaneka Corporation, Osaka, JP;

Inventors:

Hayato Kawasaki, Settsu, JP;

Kunta Yoshikawa, Settsu, JP;

Kunihiro Nakano, Settsu, JP;

Katsunori Konishi, Settsu, JP;

Kenji Yamamoto, Settsu, JP;

Assignee:

KANEKA CORPORATION, Osaka, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 31/068 (2012.01); H01L 31/0747 (2012.01); H01L 31/20 (2006.01); H01L 31/18 (2006.01); H01L 31/0216 (2014.01); H01L 31/0224 (2006.01); H01L 31/0352 (2006.01);
U.S. Cl.
CPC ...
H01L 31/0682 (2013.01); H01L 31/02167 (2013.01); H01L 31/022441 (2013.01); H01L 31/0352 (2013.01); H01L 31/03529 (2013.01); H01L 31/0747 (2013.01); H01L 31/1804 (2013.01); H01L 31/1896 (2013.01); H01L 31/20 (2013.01); H01L 31/202 (2013.01); Y02E 10/547 (2013.01); Y02P 70/50 (2015.11);
Abstract

The solar cell includes an n-type semiconductor layer and a p-type semiconductor layer on a first principal surface of a crystalline silicon substrate. The n-type semiconductor layer is provided so as to extend over a part on a p-type semiconductor layer-formed region provided with the p-type semiconductor layer, and a p-type semiconductor layer non-formed-region where the p-type semiconductor layer is not provided. In a region where the n-type semiconductor layer is provided on the p-type semiconductor layer, a protecting layer is between the p-type semiconductor layer and the n-type semiconductor layer. The protecting layer includes: an underlying protecting layer that is in contact with the p-type semiconductor layer; and an insulating layer that is on the underlying protecting layer. The underlying protecting layer includes an intrinsic silicon-based layer or an n-type silicon-based layer.


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