The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 2020

Filed:

Mar. 28, 2019
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Chun Ge, Fremont, CA (US);

Jixin Yu, Milpitas, CA (US);

Fabo Yu, San Ramon, CA (US);

Xin Yuan Li, Yokkaichi, JP;

Yanli Zhang, San Jose, CA (US);

Assignee:

SANDISK TECHNOLOGIES LLC, Addison, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/11578 (2017.01); H01L 27/11582 (2017.01); H01L 27/11573 (2017.01); H01L 27/1157 (2017.01); H01L 27/11565 (2017.01); H01L 27/11558 (2017.01); H01L 27/11524 (2017.01); H01L 27/11529 (2017.01); H01L 27/11556 (2017.01); H01L 27/11519 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 27/1157 (2013.01); H01L 27/11519 (2013.01); H01L 27/11524 (2013.01); H01L 27/11529 (2013.01); H01L 27/11556 (2013.01); H01L 27/11558 (2013.01); H01L 27/11565 (2013.01); H01L 27/11573 (2013.01);
Abstract

An alternating stack of insulating layers and spacer material layers is formed over a substrate. A staircase region having stepped surfaces is formed by patterning the alternating stack. Memory opening fill structures are formed in a memory array region, and support pillar structures are formed in the staircase region. Each of the memory stack structures includes a memory film and a vertical semiconductor channel. The support pillar structures include first support pillar structures and having a first maximum lateral dimension and second support pillar structures having a second maximum lateral dimension that is less than the first maximum lateral dimension and interlaced with the first support pillar structures. The sacrificial material layers are replaced with electrically conductive layers. The second support pillar structures are positioned interstitially among the first support pillar structures and contact via structures that are formed on the electrically conductive layers to provide additional structural support.


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