The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 2020

Filed:

Sep. 07, 2018
Applicant:

Mitsubishi Electric Corporation, Tokyo, JP;

Inventors:

Saburo Tanaka, Tokyo, JP;

Tomoaki Shimano, Tokyo, JP;

Masaki Kato, Tokyo, JP;

Jun Tahara, Tokyo, JP;

Tatsuya Fukase, Tokyo, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2006.01); H01L 25/11 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49562 (2013.01); H01L 23/49575 (2013.01); H01L 23/49861 (2013.01); H01L 25/0655 (2013.01); H01L 25/115 (2013.01);
Abstract

Provided is a small-sized power semiconductor device in which interference between power modules adjacently disposed is prevented and the areas of the gaps occurring between the power modules are reduced. In a power semiconductor device formed by adjacently disposing power modules in an arc shape on a heat sink, each of which power modules is obtained by sealing, with a mold resin, a switchable power semiconductor chip, a lead frame in which potential leads and signal terminals connected to the power semiconductor chip are formed, and a metallic inner lead electrically connecting an upper surface electrode of the power semiconductor chip and the lead frame, any one of the adjacent power modules is formed in a pentagonal shape having, at a portion adjacent to the other power module, an oblique sideobtained by cutting out one corner of a quadrangle.


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