The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 2020

Filed:

Jan. 16, 2019
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Motoki Kawasaki, Yokkaichi, JP;

Toshiyuki Sega, Yokkaichi, JP;

Assignee:

SANDISK TECHNOLOGIES LLC, Addison, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 27/11524 (2017.01); H01L 27/11556 (2017.01); H01L 27/1157 (2017.01); H01L 27/11582 (2017.01); H01L 23/528 (2006.01); H01L 23/535 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76895 (2013.01); H01L 21/76805 (2013.01); H01L 21/76816 (2013.01); H01L 21/76846 (2013.01); H01L 21/76849 (2013.01); H01L 23/5283 (2013.01); H01L 23/535 (2013.01); H01L 27/1157 (2013.01); H01L 27/11524 (2013.01); H01L 27/11556 (2013.01); H01L 27/11582 (2013.01);
Abstract

An alternating stack of insulating layers and sacrificial material layers is formed over a semiconductor material layer. Memory stack structures are formed through the alternating stack. A backside trench is formed through the alternating stack. The sacrificial material layers are replaced with electrically conductive layers. An insulating spacer is formed on sidewalls of the backside trench. A first doped semiconductor material is deposited within the backside trench. Vertical cavities are formed by vertically recessing the first doped semiconductor material at discrete locations that are laterally spaced apart. A second doped semiconductor material is deposited in the vertical cavities. The second doped semiconductor material disrupts a laterally-extending cavity in the first doped semiconductor material, thereby providing a structurally reinforced network of the first and second doped semiconductor materials for a backside contact via structure that is formed in the backside trench.


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