The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 2020

Filed:

Jul. 26, 2019
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Fumiki Aiso, Kuwana, JP;

Ryota Fujitsuka, Yokkaichi, JP;

Kensei Takahashi, Kuwana, JP;

Takayuki Matsui, Kuwana, JP;

Tomohisa Iino, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/677 (2006.01); B25J 15/00 (2006.01); H01L 21/687 (2006.01); H01L 21/67 (2006.01); B25J 11/00 (2006.01); H01L 21/673 (2006.01); C23C 16/458 (2006.01); C23C 16/44 (2006.01);
U.S. Cl.
CPC ...
H01L 21/67745 (2013.01); B25J 11/0095 (2013.01); B25J 15/0014 (2013.01); C23C 16/4583 (2013.01); H01L 21/67017 (2013.01); H01L 21/67303 (2013.01); H01L 21/67309 (2013.01); H01L 21/67313 (2013.01); H01L 21/67748 (2013.01); H01L 21/68707 (2013.01); C23C 16/44 (2013.01);
Abstract

A wafer conveying apparatus conveying a wafer onto a supporting table in manufacturing a semiconductor. A first arm retains the wafer to move to an upper region of the supporting table, and is retracted from the upper region of the supporting table after the wafer is elevated. A second arm contacts the wafer by an opening provided in the supporting table to elevate the wafer, and lowers the wafer to place the wafer on the supporting table.


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