The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 01, 2020
Filed:
Jul. 06, 2018
Applicant:
SK Hynix Inc., Icheon, KR;
Inventors:
Seung-Gyu Jeong, Icheon, KR;
Do-Sun Hong, Icheon, KR;
Jung-Hyun Kwon, Seoul, KR;
Won-Gyu Shin, Icheon, KR;
Assignee:
SK hynix Inc., Icheon, KR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/10 (2006.01); G06F 3/06 (2006.01); G06F 12/1009 (2016.01); G11C 8/06 (2006.01); G11C 29/52 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G06F 3/064 (2013.01); G06F 3/0619 (2013.01); G06F 3/0679 (2013.01); G06F 11/1048 (2013.01); G06F 12/1009 (2013.01); G11C 8/06 (2013.01); G06F 2212/1008 (2013.01); G06F 2212/657 (2013.01); G11C 29/52 (2013.01);
Abstract
A memory controller may include an address control block. The address control block may be configured to remap a write target address when a number of write data having a first logic level is within a correctable range and when a level of a datum corresponding to the write target address has the first logic level.