The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 01, 2020
Filed:
Jan. 28, 2019
Applicant:
Japan Display Inc., Tokyo, JP;
Inventor:
Hiroshi Kurihara, Tokyo, JP;
Assignee:
Japan Display Inc., Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); H03M 13/09 (2006.01); G09G 3/36 (2006.01); H03M 13/00 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1004 (2013.01); G09G 3/3648 (2013.01); G09G 3/3677 (2013.01); H03M 13/09 (2013.01); H03M 13/091 (2013.01); H03M 13/6561 (2013.01); G09G 2330/12 (2013.01);
Abstract
A display configured to detect an error in display data without a parallel-serial conversion circuit is provided. The display includes a display area, a control unit, and a plurality of first CRC circuits. The control unit receives whole display data to control the display area. The whole display data includes a plurality of unit display data and a plurality of CRC data. The plurality of unit display data are each composed of a predetermined count of bits. A count of the plurality of CRC data is identical to the predetermined count of bits. The plurality of first CRC circuits correspond to the respective plurality of CRC data.