The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 2020

Filed:

Jan. 03, 2020
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Sangyong No, Seoul, KR;

Kwihyun Kim, Yongin-si, KR;

Jiho Moon, Cheonan-si, KR;

Keebum Park, Cheonan-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1368 (2006.01); G02F 1/1362 (2006.01); G02F 1/1343 (2006.01); G02F 1/1335 (2006.01); G02F 1/1333 (2006.01); G02F 1/133 (2006.01); G02F 1/1337 (2006.01);
U.S. Cl.
CPC ...
G02F 1/1368 (2013.01); G02F 1/13439 (2013.01); G02F 1/13624 (2013.01); G02F 1/133345 (2013.01); G02F 1/133512 (2013.01); G02F 1/133514 (2013.01); G02F 1/134309 (2013.01); G02F 1/136286 (2013.01); G02F 1/13306 (2013.01); G02F 1/133528 (2013.01); G02F 1/133788 (2013.01); G02F 1/136227 (2013.01); G02F 2001/133531 (2013.01); G02F 2001/133742 (2013.01); G02F 2001/134345 (2013.01); G02F 2201/121 (2013.01); G02F 2201/123 (2013.01); G02F 2203/04 (2013.01);
Abstract

A liquid crystal display device includes a liquid crystal layer between first and second substrate. The first substrate includes a first and second sub-pixel areas. A first sub-pixel electrode is on the first substrate in the first sub-pixel area, and a first transistor is connected to a gate line, data line, and first sub-pixel electrode on the first substrate. A second sub-pixel electrode is on the first substrate in the second sub-pixel area, and a second transistor is connected to the gate line, the first transistor, and the second sub-pixel electrode. A first storage line is adjacent to one side of the first sub-pixel electrode. A second storage line is spaced from the first storage line and is adjacent to one side of the second sub-pixel electrode. A third transistor is connected to the gate line, second transistor, and second storage line.


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