The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 2020

Filed:

Aug. 30, 2018
Applicant:

Kabushiki Kaisha Toshiba, Tokyo, JP;

Inventors:

Akihiro Goryu, Kanagawa, JP;

Mitsuaki Kato, Kanagawa, JP;

Kenji Hirohata, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/3065 (2006.01); H01L 29/16 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 29/78 (2006.01); H01L 29/04 (2006.01);
U.S. Cl.
CPC ...
H01L 29/1608 (2013.01); H01L 29/045 (2013.01); H01L 29/41741 (2013.01); H01L 29/42356 (2013.01); H01L 29/66068 (2013.01); H01L 29/78 (2013.01); H01L 29/7827 (2013.01); H01L 29/7842 (2013.01); H01L 29/7849 (2013.01);
Abstract

A semiconductor device comprises a semiconductor chip and a mounting substrate. The semiconductor chip has an element structure including: a silicon carbide substrate that has a hexagonal crystal structure; a gate electrode that is disposed on a part above a first surface corresponding to a (0001) plane or a (000-1) plane of the silicon carbide substrate; an insulating film that is interposed between the silicon carbide substrate and the gate electrode; and a source and a drain that are disposed with respect to the silicon carbide substrate and the gate electrode such that at least a part of a channel through which a carrier moves extends in a <1-100> direction of crystal orientation of the silicon carbide substrate. The mounting substrate is fixed with the semiconductor chip such that compressive stress in a <11-20> direction of crystal orientation of the silicon carbide substrate is applied to the semiconductor chip at least in operation.


Find Patent Forward Citations

Loading…