The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 2020

Filed:

Jan. 12, 2018
Applicants:

Massachusetts Institute of Technology, Cambridge, MA (US);

Nanyang Technological University, Singapore, SG;

National University of Singapore, Singapore, SG;

Inventors:

Li Zhang, Singapore, SG;

Eng Kian Kenneth Lee, Singapore, SG;

Soo Jin Chua, Singapore, SG;

Eugene A. Fitzgerald, Cambridge, MA (US);

Siau Ben Chiah, Singapore, SG;

Joseph Sylvester Chang, Singapore, SG;

Yong Qu, Singapore, SG;

Wei Shu, Singapore, SG;

Kwang Hong Lee, Singapore, SG;

Bing Wang, Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 21/8238 (2006.01); H01L 25/00 (2006.01); H01L 33/00 (2010.01);
U.S. Cl.
CPC ...
H01L 27/1262 (2013.01); H01L 21/8238 (2013.01); H01L 25/50 (2013.01); H01L 27/124 (2013.01); H01L 33/005 (2013.01);
Abstract

A method of forming a multilayer structure for a pixelated display and a multilayer structure for a pixelated display is provided. The method comprising providing a first wafer comprising first layers disposed over a first substrate, said first layers comprising non-silicon based semiconductor material for forming p-n junction LEDs (light emitting devices); providing a second partially processed wafer comprising silicon-based CMOS (Complementary Metal Oxide Semiconductor) devices formed in second layers disposed over a second substrate, said CMOS devices for controlling the LEDs; and bonding the first and second wafers to form a composite wafer via a double-bonding transfer process.


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