The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 24, 2020
Filed:
Oct. 24, 2018
AU Optronics Corporation, Hsin-Chu, TW;
Chien-Chuan Ko, Hsin-Chu, TW;
Meng-Chieh Tsai, Hsin-Chu, TW;
AU OPTRONICS CORPORATION, Hsin-chu, TW;
Abstract
A scan driver that includes a plurality of stages of scan driving circuits is provided. Each scan driving circuit includes: a driving transistor, including: a control terminal configured to receive a current-stage scan control signal, a first terminal configured to receive a first clock signal, and a second terminal configured to output a current-stage scan signal; an input stage circuit coupled to the driving transistor, where the input stage circuit includes: a first input transistor and a second input transistor, the first input transistor includes: a control terminal, a first terminal, and a second terminal, the second input transistor includes: a control terminal, a first terminal, and a second terminal, the control terminal of the first input transistor is configured to receive a next-stage scan signal, the control terminal of the second input transistor is configured to receive a previous-stage scan signal, and the second terminal of the first input transistor and the second terminal of the second input transistor are coupled to the control terminal of the driving transistor; a pull-down circuit, coupled to the driving transistor and configured to pull down the current-stage scan control signal and the current-stage scan signal; and a capacitor, coupled to the driving transistor and configured to maintain the current-stage scan control signal, where in a first scan mode, the first terminal of the first input transistor receives the first clock signal, and the first terminal of the second input transistor receives a first scan direction control signal; and in a second scan mode, the first terminal of the first input transistor receives a second scan direction control signal, and the first terminal of the second input transistor receives the first clock signal.