The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 24, 2020
Filed:
Dec. 11, 2018
Applicant:
Xilinx, Inc., San Jose, CA (US);
Inventors:
Avinash Somalinga Suresh, Hyderabad, IN;
Nabeel Shirazi, Saratoga, CA (US);
Daniel E. Michek, San Diego, CA (US);
Daniel G. Gibbons, Niwot, CO (US);
Assignee:
Xilinx, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/327 (2020.01); G06F 30/34 (2020.01); G06F 30/331 (2020.01); G06F 8/41 (2018.01); G06F 30/30 (2020.01);
U.S. Cl.
CPC ...
G06F 30/327 (2020.01); G06F 8/443 (2013.01); G06F 8/447 (2013.01); G06F 30/331 (2020.01); G06F 30/34 (2020.01); G06F 30/30 (2020.01);
Abstract
A design tool executing on a computer system converts a block model of a circuit design to a high-level language (HLL) specification. The design tool then converts the HLL specification to a hardware description language (HDL) specification. Circuit implementation data is generated from the HDL specification by the design tool, and the circuit implementation data can be used to make an integrated circuit that performs functions specified by the circuit design.