The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 2020

Filed:

Jan. 28, 2019
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Vladislav Petkov, Cupertino, CA (US);

Haining Zhang, Cupertino, CA (US);

Karan Sanghi, Cupertino, CA (US);

Saurabh Garg, Cupertino, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/1009 (2016.01); G06F 8/61 (2018.01); G06F 13/42 (2006.01); G06F 1/24 (2006.01); G06F 12/14 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 12/1009 (2013.01); G06F 1/24 (2013.01); G06F 3/0626 (2013.01); G06F 3/0637 (2013.01); G06F 3/0665 (2013.01); G06F 3/0683 (2013.01); G06F 8/63 (2013.01); G06F 12/1441 (2013.01); G06F 13/4282 (2013.01); G06F 2212/1008 (2013.01); G06F 2212/1052 (2013.01); G06F 2212/1056 (2013.01); G06F 2212/621 (2013.01); G06F 2213/0026 (2013.01);
Abstract

Methods and apparatus for locking at least a portion of a shared memory resource. In one embodiment, an electronic device configured to lock at least a portion of a shared memory is disclosed. The electronic device includes a host processor, at least one peripheral processor and a physical bus interface configured to couple the host processor to the peripheral processor. The electronic device further includes a software framework that is configured to: attempt to lock a portion of the shared memory; verify that the peripheral processor has not locked the shared memory; when the portion of the shared memory is successfully locked via the verification that the peripheral processor has not locked the portion of the shared memory, execute a critical section of the shared memory; and otherwise attempt to lock the at least the portion of the shared memory at a later time.


Find Patent Forward Citations

Loading…