The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 24, 2020
Filed:
Mar. 21, 2019
Applicant:
Silicon Motion Inc., Hsinchu County, TW;
Inventors:
Tsung-Chieh Yang, Hsinchu, TW;
Hong-Jung Hsu, Kaohsiung, TW;
Assignee:
Silicon Motion, Inc., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); G11C 11/56 (2006.01); G11C 16/08 (2006.01); G06F 3/06 (2006.01); G11C 16/16 (2006.01); G11C 16/26 (2006.01); G11C 29/52 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1072 (2013.01); G06F 3/064 (2013.01); G06F 3/0604 (2013.01); G06F 3/0619 (2013.01); G06F 3/0688 (2013.01); G11C 11/5628 (2013.01); G11C 11/5635 (2013.01); G11C 11/5642 (2013.01); G11C 16/08 (2013.01); G11C 16/16 (2013.01); G11C 16/26 (2013.01); G11C 29/52 (2013.01); G11C 2211/5641 (2013.01);
Abstract
A method for accessing a flash memory module is provided. The flash memory module is a 3D flash memory module including a plurality of flash memory chips, each flash memory chip includes a plurality of blocks, each block includes a plurality of pages, and the method includes: configuring the flash memory chips to set at least a first super block and at least a second super block of the flash memory chips; and allocating the second super block to store a plurality of temporary parities generated when data is written into the first super block.