The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 24, 2020
Filed:
Mar. 06, 2018
Kabushiki Kaisha Toshiba, Minato-ku, JP;
Toshiba Electronic Devices & Storage Corporation, Minato-ku, JP;
Naoaki Ohkubo, Yokohama, JP;
Jun Tanabe, Yokohama, JP;
KABUSHIKI KAISHA TOSHIBA, Minato-ku, JP;
TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION, Minato-ku, JP;
Abstract
A system LSI including: a first group including a first CPU and a first module; a second group including a second CPU and a second module having the same configuration as the first module has; and a shared memory including a first area for which cache coherency is maintained by an access from the first group, and a second area for which cache coherency is maintained by an access from the second group, the shared memory electrically connected to the first group and the second group. The first group includes a first bus through which cache coherency is maintained between the first CPU and the first module, and a second bus which electrically connects the first bus and the first module to each other. The second group includes a third bus through which cache coherency is maintained between the second CPU and the second module, and a fourth bus which electrically connects the third bus and the second module to each other.