The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 2020

Filed:

Sep. 06, 2017
Applicant:

Commissariat a L'energie Atomique ET Aux Energies Alternatives, Paris, FR;

Inventors:

Karim Ben Chehida, Suresnes, FR;

Paul-Antoine Arras, Massy, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2018.01); G06F 9/30 (2018.01); G06F 9/48 (2006.01); G06F 1/3228 (2019.01); G06F 9/38 (2018.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 9/30156 (2013.01); G06F 1/3228 (2013.01); G06F 9/3885 (2013.01); G06F 9/4881 (2013.01); G06F 9/5038 (2013.01); G06F 9/5044 (2013.01); G06F 2209/509 (2013.01); Y02D 10/00 (2018.01);
Abstract

A method for managing a computation task on a functionally asymmetric multi-core processor includes a plurality of cores at least one of which comprises at least one hardware extension for executing specialized instructions, comprising the following steps: a) starting the execution of the computation task on a core of the processor; b) monitoring a parameter indicative of a quality of service of the computation task, and at least a number of specialized instructions loaded by the core; c) identifying instants splitting an application period of the computation task into a predetermined number of portions; d) computing costs or gains in quality of service and in energy consumption corresponding to different management options of the computation task; and e) making a management choice according to the costs or gains thus computed. Computer program product, processor and computer system for implementing such a method are also provided.


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