The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 2020

Filed:

Dec. 23, 2019
Applicants:

Stmicroelectronics SA, Montrouge, FR;

Stmicroelectronics Razvoj Polprevodnikov D.o.o., Ljubljana, SI;

Inventors:

Maksimiljan Stiglic, Maribor, SI;

Nejc Suhadolnik, Jezero, SI;

Marc Houdebine, Crolles, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D 3/24 (2006.01); H04L 7/033 (2006.01); H04B 5/00 (2006.01); G06K 19/07 (2006.01); H03C 3/09 (2006.01); H03L 7/099 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0331 (2013.01); G06K 19/0723 (2013.01); H03C 3/095 (2013.01); H03C 3/0925 (2013.01); H03L 7/0991 (2013.01); H04B 5/0031 (2013.01); H04B 5/0056 (2013.01); H04B 5/0062 (2013.01); H03L 2207/50 (2013.01);
Abstract

A transponder communicates with a reader using active load modulation. The transponder includes a digital phase locked loop (DPLL), which, in operation, generates an active load modulation (ALM) carrier clock synchronized to carrier clock of the reader. Between transmission of data frames, the DPLL is placed in a lock mode of operation in which a feedback loop of the DPLL is closed. Within a transmitted data frame having a duration, the DPLL is placed, for the duration of the transmitted data frame, in a hold mode of operation in which the feedback loop is opened. A phase of the ALM carrier clock is adjusted at least once during the duration of the transmitted data frame.


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