The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 2020
Filed:
Sep. 19, 2019
Applicant:
International Business Machines Corporation, Armonk, NY (US);
Inventors:
Xuefeng Liu, Schenectady, NY (US);
Junli Wang, Albany, NY (US);
Brent A. Anderson, Jericho, VT (US);
Terence B. Hook, Jericho, VT (US);
Gauri Karve, Cohoes, NY (US);
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 21/762 (2006.01); H01L 29/66 (2006.01); H01L 29/417 (2006.01); H01L 29/10 (2006.01); H01L 27/088 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7827 (2013.01); H01L 21/762 (2013.01); H01L 27/088 (2013.01); H01L 29/1037 (2013.01); H01L 29/41741 (2013.01); H01L 29/41783 (2013.01); H01L 29/6656 (2013.01); H01L 29/66628 (2013.01); H01L 29/66666 (2013.01); H01L 29/66795 (2013.01); H01L 29/78 (2013.01); H01L 29/785 (2013.01); H01L 21/76224 (2013.01);
Abstract
A semiconductor device includes a substrate having an input/output (IO) field-effect transistor (FET) device area, and an IO FET device formed in the IO FET device area. The IO FET device includes at least two fin structures separated by a distance associated with a length of a channel connecting the at least two fin structures. The length of the channel is determined based on at least one voltage for implementing the IO FET device.