The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 2020

Filed:

Feb. 26, 2019
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Takamasa Ito, Nagoya, JP;

Ken Komiya, Nagoya, JP;

Tsuneo Uenaka, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11582 (2017.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H01L 27/1157 (2017.01); H01L 29/10 (2006.01); H01L 27/11565 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 23/528 (2013.01); H01L 23/53257 (2013.01); H01L 23/53271 (2013.01); H01L 23/53295 (2013.01); H01L 27/1157 (2013.01); H01L 29/1037 (2013.01); H01L 27/11565 (2013.01);
Abstract

A semiconductor storage device includes a base portion, a stacked body, and a first column. The base portion includes a substrate, a semiconductor element on the substrate, lower-layer wiring above the semiconductor element, and a first conductive layer above the lower-layer wiring and made of a metal compound or polycrystal silicon. The stacked body is above the first conductive layer. The stacked body includes second conductive layers and insulating films stacked alternately. The first column includes a semiconductor body and a memory film. The semiconductor body extends in a stacked direction of the stacked body and is electrically connected to the first conductive layer. A memory film has a charge trap between the plurality of second conductive layers and the semiconductor body. The first conductive layer is provided between the stacked body and the lower-layer wiring, and between a peripheral region of the stacked body and the lower-layer wiring.


Find Patent Forward Citations

Loading…