The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 2020

Filed:

Nov. 29, 2018
Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventor:

Hsiang-Lan Lung, Ardsley, NY (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11551 (2017.01); H01L 27/11578 (2017.01); G11C 13/00 (2006.01); G11C 8/08 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11551 (2013.01); G11C 8/08 (2013.01); G11C 13/0026 (2013.01); G11C 13/0028 (2013.01); H01L 27/11578 (2013.01); G11C 2213/71 (2013.01);
Abstract

A memory includes a plurality of levels of word lines interleaved with a plurality of levels of channel lines. Horizontal data storage levels are disposed between the plurality of levels of word lines and the plurality of levels of channel lines, the data storage levels including respective arrays of data storage regions in cross points of word lines and channel lines in adjacent levels of the plurality of levels of word lines and the plurality of levels of channel lines. Respective arrays of holes outside of the cross points are disposed in the channel line and word line levels. The channel lines and word lines have sides defined by undercut etch perimeters, along with air gaps or voids between the channel lines and word lines in each level. The word lines, bit lines and data storage nodes in each layer are vertically self-aligned.


Find Patent Forward Citations

Loading…