The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 2020
Filed:
Nov. 27, 2017
Applicant:
Ares Materials Inc., Dallas, TX (US);
Inventors:
Radu Reit, Carrollton, TX (US);
David Arreaga-Salas, Garland, TX (US);
Assignee:
ARES MATERIALS INC., Dallas, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/68 (2006.01); H01L 21/683 (2006.01); B32B 17/10 (2006.01); B32B 37/26 (2006.01); H01L 27/12 (2006.01); H01L 23/24 (2006.01);
U.S. Cl.
CPC ...
H01L 21/6835 (2013.01); B32B 17/1055 (2013.01); B32B 37/26 (2013.01); H01L 23/24 (2013.01); H01L 27/1266 (2013.01); H01L 2221/6835 (2013.01); H01L 2221/68395 (2013.01);
Abstract
Provided are microelectronics substrates and methods of manufacturing and using the microelectronics substrate. An example of a microelectronics substrate includes a carrier, a silicate bonding layer, and a flexible substrate, wherein the flexible substrate is bonded to the silicate bonding layer. The microelectronics substrate comprises a peel strength between the flexible substrate and silicate bonding layer; wherein the peel strength between the flexible substrate and the silicate bonding layer is below 1 kgf/m.