The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2020

Filed:

Feb. 27, 2019
Applicant:

Excelfore Corporation, Fremont, CA (US);

Inventors:

Shrikant Acharya, Fremont, CA (US);

Anoop Balakrishnan, Fremont, CA (US);

John Crosbie, Fremont, CA (US);

Pawel Veselov, Saratoga, CA (US);

Assignee:

Excelfore Corporation, Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 29/08 (2006.01); H04L 9/00 (2006.01); H04L 12/40 (2006.01); H04W 4/44 (2018.01); G06F 8/65 (2018.01); H04L 9/08 (2006.01); H04L 9/32 (2006.01); H04L 12/741 (2013.01); H04L 29/06 (2006.01); H04L 29/12 (2006.01);
U.S. Cl.
CPC ...
H04L 67/141 (2013.01); G06F 8/65 (2013.01); H04L 9/006 (2013.01); H04L 9/0816 (2013.01); H04L 9/3263 (2013.01); H04L 12/40 (2013.01); H04L 45/74 (2013.01); H04L 61/103 (2013.01); H04L 63/0823 (2013.01); H04L 63/102 (2013.01); H04L 63/166 (2013.01); H04L 67/12 (2013.01); H04L 67/34 (2013.01); H04W 4/44 (2018.02); H04L 2012/40215 (2013.01); H04L 2012/40273 (2013.01);
Abstract

A system and method for an eSync bus protocol is provided. The eSync bus protocol uses a broker to route communications between electronic devices within an electronic environment, such as within a vehicle or the like. The electronic devices may first register with the broker, and thereafter send messages to the broker for routing to other registered electronic devices. In this way, the broker may as an intermediary to route communications using the eSync bus protocol. A multi-client architecture is also provided in which multiple domains may be defined by the functions performed by electronic devices within a respective domain.


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