The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2020

Filed:

Jan. 15, 2020
Applicant:

Analog Bits Inc., Sunnyvale, CA (US);

Inventors:

Raghunand Bhagwan, Sunnyvale, CA (US);

Alan C. Rogers, Palo Alto, CA (US);

Assignee:

Analog Bits Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/093 (2006.01); H03L 7/089 (2006.01); H03L 7/18 (2006.01); H03L 7/099 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0891 (2013.01); H03L 7/093 (2013.01); H03L 7/099 (2013.01); H03L 7/18 (2013.01);
Abstract

A phase locked loop (PLL) includes: a phase frequency detector configured to: generate one or more comparison signals indicating whether a reference input signal is leading a feedback signal or whether the feedback signal is leading the reference input signal; a charge pump coupled to the phase frequency detector and configured to convert the one or more comparison signals into a driving current; a loop filter coupled to the charge pump and configured to split the driving current to generate a first voltage signal and a second voltage signal; and a voltage controlled oscillator coupled to the loop filter and configured to: receive the first voltage signal and generate a first control current; receive the second voltage signal and generate a second control current; and combine the first and second control currents to jointly drive a charge controlled oscillator such that the output signal of a desired frequency is generated.


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