The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 10, 2020
Filed:
Nov. 08, 2019
Applicant:
Nvidia Corp., Santa Clara, CA (US);
Inventors:
Gaurawa Kumar, Campbell, CA (US);
Ky-Anh Tran, Redwood, CA (US);
Olakanmi Oluwole, Mountain View, CA (US);
Vishnu Balan, Saratoga, CA (US);
Assignee:
NVIDIA Corp., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D 3/24 (2006.01); H03L 7/08 (2006.01); H04L 25/03 (2006.01); H04L 25/497 (2006.01); H04L 25/49 (2006.01); H04L 25/06 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0807 (2013.01); H04L 25/03057 (2013.01); H04L 25/063 (2013.01); H04L 25/4902 (2013.01); H04L 25/497 (2013.01); H04L 2025/03369 (2013.01);
Abstract
This disclosure relates to a receiver comprising a clock and data recovery loop and a phase offset loop. The clock and data recovery loop may be controlled by a sum of gradients for a plurality of data interleaves. The phase offset loop may be controlled by an accumulated differential gradient for each of the data interleaves.