The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2020

Filed:

Nov. 06, 2018
Applicant:

Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;

Inventors:

Tejasvi Das, Austin, TX (US);

Johann G. Gaboriau, Austin, TX (US);

Assignee:

Cirrus Logic, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/017 (2006.01); H03K 3/011 (2006.01); H03G 3/30 (2006.01); H04R 3/00 (2006.01); H03F 3/183 (2006.01);
U.S. Cl.
CPC ...
H03K 3/017 (2013.01); H03F 3/183 (2013.01); H03G 3/3005 (2013.01); H03K 3/011 (2013.01); H04R 3/00 (2013.01); H03F 2200/03 (2013.01); H03G 2201/103 (2013.01);
Abstract

In accordance with embodiments of the present disclosure, an apparatus may include a signal path comprising a closed-loop analog pulse width modulator having a forward signal path and a feedback path, a variable resistor coupled to an output of the closed-loop analog pulse width modulator, and a control circuit configured to modify the variable resistor in order to modify an output impedance outside of the feedback path of the closed-loop analog pulse width modulator responsive to a condition for switching between a high output impedance mode and a low output impedance mode of the closed-loop analog pulse width modulator or vice versa.


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