The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2020

Filed:

Oct. 25, 2018
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventor:

Kyu Dong Hwang, Cheongju-si, KR;

Assignee:

SK hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01); H03F 3/345 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03F 3/45192 (2013.01); H03F 3/345 (2013.01); H03K 5/00 (2013.01); H03F 2200/453 (2013.01); H03F 2203/45138 (2013.01);
Abstract

A buffer circuit may include: an amplifying circuit configured to change, based on a first input signal and a second input signal, voltage levels of a first output node and a second output node in a range between a first power voltage and a second power voltage; a latch circuit configured to latch the voltage levels of the first output node and the second output node; a first variable load configured to adjust, based on a reset signal, an amount of current provided by a first power voltage terminal at the first power voltage to the first output node; a second variable load configured to adjust, based on the reset signal, an amount of current provided by the first power voltage terminal to the second output node; and a reset circuit configured to drive the first output node to the second power voltage based on the reset signal.


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