The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2020

Filed:

Jul. 25, 2018
Applicants:

Muhammad Ayman Shibib, San Jose, CA (US);

Chungchi Gina Liao, Los Altos, CA (US);

Inventors:

Muhammad Ayman Shibib, San Jose, CA (US);

Chungchi Gina Liao, Los Altos, CA (US);

Assignee:

Vishay Siliconix, LLC, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 27/02 (2006.01); H01L 29/20 (2006.01); H01L 29/66 (2006.01); H01L 29/778 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0255 (2013.01); H01L 29/2003 (2013.01); H01L 29/66462 (2013.01); H01L 29/778 (2013.01);
Abstract

A multi-gate High Electron Mobility Transistor (HEMT) can include a Two-Dimension Electron Gas (2DEG) channel between the drain and the source. A first gate can be disposed proximate the 2DEG channel between the drain and source. The first gate can be configured to deplete majority carriers in the 2DEG channel proximate the first gate when a potential applied between the first gate and the source is less than a threshold voltage associated with the first gate. A second gate can be disposed proximate the 2DEC channel, between the drain and the first gate. The second gate can be electrically coupled to the drain. The second gate can be configured to deplete majority carriers in the 2DEG channel proximate the second gate when a potential applied between the second gate and the 2DEG channel between the second gate and the first gate is less than a threshold voltage associated with the second gate. The threshold voltage associated with the second gate can be equal to or greater than the threshold voltage associated with the first gate.


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