The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 10, 2020
Filed:
Jul. 03, 2019
Globalfoundries Inc., Grand Cayman, KY;
Mahbub Rashed, Santa Clara, CA (US);
Irene Y. Lin, Los Altos Hills, CA (US);
Steven Soss, Cornwall, NY (US);
Jeff Kim, San Jose, CA (US);
Chinh Nguyen, Austin, TX (US);
Marc Tarabbia, Pleasant Valley, NY (US);
Scott Johnson, Wappingers Falls, NY (US);
Subramani Kengeri, San Jose, CA (US);
Suresh Venkatesan, Danbury, CT (US);
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Abstract
A semiconductor device includes a substrate with first and second transistors disposed thereon and including sources, drains, and gates, wherein the first and second gates extend longitudinally as part of linear strips that are parallel to and spaced apart. The device further includes a first CB layer forming a local interconnect electrically connected to the first gate, a second CB layer forming a local interconnect electrically connected to the second gate, and a CA layer forming a local interconnect extending longitudinally between first and second ends of the CA layer. The first and second CB layers and the CA layer are disposed between a first metal layer and the substrate. The first metal layer is disposed above each source, drain, and gate of the transistors, The CA layer extends parallel to the first and second linear strips and is substantially perpendicular to the first and second CB layers.