The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2020

Filed:

Jun. 13, 2019
Applicant:

Rohm Co., Ltd., Kyoto-shi, Kyoto, JP;

Inventors:

Seigo Mori, Kyoto, JP;

Masatoshi Aketa, Kyoto, JP;

Assignee:

ROHM CO., LTD., Kyoto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/52 (2006.01); H01L 29/417 (2006.01); H01L 29/47 (2006.01); H01L 29/78 (2006.01); H01L 29/872 (2006.01); H01L 29/06 (2006.01); H01L 29/12 (2006.01); H01L 29/808 (2006.01); H01L 23/495 (2006.01); H01L 29/739 (2006.01); H01L 29/08 (2006.01); H01L 27/04 (2006.01); H01L 23/00 (2006.01); H01L 29/32 (2006.01); H01L 29/861 (2006.01); H01L 29/16 (2006.01); H01L 27/06 (2006.01); H01L 27/088 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
H01L 21/52 (2013.01); H01L 23/48 (2013.01); H01L 23/49503 (2013.01); H01L 23/49562 (2013.01); H01L 24/83 (2013.01); H01L 27/04 (2013.01); H01L 29/06 (2013.01); H01L 29/0834 (2013.01); H01L 29/12 (2013.01); H01L 29/417 (2013.01); H01L 29/47 (2013.01); H01L 29/7395 (2013.01); H01L 29/78 (2013.01); H01L 29/8083 (2013.01); H01L 29/872 (2013.01); H01L 27/0694 (2013.01); H01L 27/088 (2013.01); H01L 29/0619 (2013.01); H01L 29/1608 (2013.01); H01L 29/32 (2013.01); H01L 29/402 (2013.01); H01L 29/8611 (2013.01); H01L 2224/0603 (2013.01); H01L 2224/32258 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/4903 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/181 (2013.01);
Abstract

A semiconductor device according to the present invention includes a semiconductor chip having a semiconductor layer that has a first surface on a die-bonding side, a second surface on the opposite side of the first surface, and an end surface extending in a direction crossing the first surface and the second surface, a first electrode that is formed on the first surface and has a peripheral edge at a position separated inward from the end surface, and a second electrode formed on the second surface, a conductive substrate onto which the semiconductor chip is die-bonded, a conductive spacer that has a planar area smaller than that of the first electrode and supports the semiconductor chip on the conductive substrate, and a resin package that seals at least the semiconductor chip and the conductive spacer.


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