The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2020

Filed:

Feb. 19, 2019
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Paolo Novellini, Gorgonzola, IT;

Giovanni Guasti, Cornaredo, IT;

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01); G11C 11/4076 (2006.01); G11C 7/22 (2006.01); G06F 1/10 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4076 (2013.01); G06F 1/10 (2013.01); G11C 7/222 (2013.01); G11C 2207/22 (2013.01);
Abstract

A receiver implemented in an integrated circuit device is described. The receiver circuit comprises a first receiver circuit configured to receive first data, wherein the first receiver circuit comprises a first memory element configured to receive the first data in response to a first clock signal; a latency mirror circuit configured to receive second data, wherein the latency mirror circuit comprises a second memory element configured to receive the second data in response to a second clock signal; and a latency control circuit configured to detect a latency in the second data, wherein the latency control circuit adjusts a phase of the first clock signal used to receive the first data in the first receiver circuit.


Find Patent Forward Citations

Loading…