The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2020

Filed:

Jul. 30, 2018
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Derek E. Williams, Round Rock, TX (US);

Guy L. Guthrie, Austin, TX (US);

Hugh Shen, Round Rock, TX (US);

Sanjeev Ghai, Round Rock, TX (US);

Hung Doan, Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/14 (2006.01); G06F 12/0802 (2016.01); G06F 9/30 (2018.01); G06F 30/30 (2020.01);
U.S. Cl.
CPC ...
G06F 11/142 (2013.01); G06F 9/30043 (2013.01); G06F 12/0802 (2013.01); G06F 30/30 (2020.01); G06F 2212/1041 (2013.01); G06F 2212/60 (2013.01);
Abstract

In a processing unit, a processor core executes instructions in a plurality of simultaneous hardware threads, where multiple of the plurality of hardware threads concurrently execute memory transactions. A transactional memory circuit in the processing unit tracks transaction footprints of the memory transactions of the multiple hardware thread. In response to detecting failure of a given memory transaction of one of the plurality of multiple threads due to an overflow condition, the transactional memory circuit transitions to a throttled operating mode and reduces a number of hardware threads permitted to concurrently execute memory transactions.


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