The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 10, 2020
Filed:
Sep. 12, 2018
Qualcomm Incorporated, San Diego, CA (US);
Shivam Priyadarshi, Morrisville, NC (US);
SeyedMajid Zahedi, Durham, NC (US);
Derek Robert Hower, Durham, NC (US);
Carl Alan Waldspurger, Palo Alto, CA (US);
Jeffrey Todd Bridges, Raleigh, NC (US);
Sanjay Bhikhubhai Patel, Cary, NC (US);
Gabriel Martel Tarr, Durham, NC (US);
Chih Kang Lin, Raleigh, NC (US);
Ryan Donovan Wells, Raleigh, NC (US);
Harold Wade Cain, III, Raleigh, NC (US);
Qualcomm Incorporated, San Diego, CA (US);
Abstract
Allocating power between multiple central processing units (CPUs) in a multi-CPU processor based on total current availability and individual CPU quality-of-service (QoS) requirements is disclosed. Current from a power rail is allocated to CPUs by a global current manger (GCM) circuit related to performance criteria set by CPUs. The CPUs can request increased current allocation from the GCM circuit, such as in response to executing a higher performance task. If the increased current allocation request keeps total current on the power rail within its maximum rail current limit, the GCM circuit approves the request to allow the CPU increased current allocation. This can allow CPUs executing higher performance tasks to have a larger current allocation than CPUs executing lower performance tasks without the maximum rail current limit being exceeded, and without having to necessarily lower voltage of the power rail, which could unnecessarily lower performance of all CPUs.