The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2020

Filed:

Jun. 26, 2019
Applicant:

Skyworks Solutions, Inc., Woburn, MA (US);

Inventor:

Nuttapong Srirattana, Lexington, MA (US);

Assignee:

SKYWORKS SOLUTIONS, INC., Irvine, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03H 11/34 (2006.01); H01Q 1/50 (2006.01); H03F 3/19 (2006.01); H04B 1/48 (2006.01); H03F 3/21 (2006.01); H03F 3/68 (2006.01); H03K 17/693 (2006.01); H03F 3/24 (2006.01); H03F 3/72 (2006.01); H03K 17/06 (2006.01);
U.S. Cl.
CPC ...
H03H 11/342 (2013.01); H01Q 1/50 (2013.01); H03F 3/19 (2013.01); H03F 3/21 (2013.01); H03F 3/245 (2013.01); H03F 3/68 (2013.01); H03F 3/72 (2013.01); H03K 17/063 (2013.01); H03K 17/693 (2013.01); H04B 1/48 (2013.01); H03F 2200/111 (2013.01); H03F 2200/451 (2013.01); H03F 2203/7209 (2013.01); H03K 2017/066 (2013.01); H04B 2001/485 (2013.01);
Abstract

An example of a signal switch includes a first transistor coupled between first and second nodes, a plurality of second transistors coupled in series between the first and second nodes, in parallel with the first transistor, a third transistor coupled between the first node and a third node, and a plurality of fourth transistors coupled in series between the first and third nodes, in parallel with the third transistor. The signal switch further includes a first shunt path including a first shunt transistor and a first inductor connected in series between a reference node and a first connection point between two of the plurality of second transistors, and a second shunt path including a second shunt transistor and a second inductor connected in series between the reference node and a second connection point between two of the plurality of fourth transistors.


Find Patent Forward Citations

Loading…