The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2020

Filed:

Sep. 07, 2016
Applicant:

Imec Vzw, Leuven, BE;

Inventors:

Boon Teik Chan, Leuven, BE;

Vasile Paraschiv, Kessel-lo, BE;

Efrain Altamirano Sanchez, Kessel-lo, BE;

Zheng Tao, Leuven, BE;

Assignee:

IMEC VZW, Leuven, BE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/3065 (2006.01); H01L 21/308 (2006.01); H01L 21/306 (2006.01); H01L 21/02 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/775 (2006.01); B82Y 40/00 (2011.01); B82Y 10/00 (2011.01); H01L 21/265 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02603 (2013.01); B82Y 10/00 (2013.01); B82Y 40/00 (2013.01); H01L 21/265 (2013.01); H01L 21/28008 (2013.01); H01L 21/3065 (2013.01); H01L 21/3083 (2013.01); H01L 21/3085 (2013.01); H01L 29/0676 (2013.01); H01L 29/66439 (2013.01); H01L 29/66666 (2013.01); H01L 29/775 (2013.01);
Abstract

A method for producing a pillar structure in a semiconductor layer, the method including providing a structure including, on a main surface, a semiconductor layer. A patterned hard mask layer stack is provided on the semiconductor layer that includes a first layer in contact with the semiconductor layer and a second layer overlying and in contact with the first layer. The semiconductor layer is etched using the patterned hard mask layer stack as a mask. The etching includes subjecting the structure to a first plasma thereby removing a first part of the semiconductor layer and at least a part of the second layer while preserving the first layer thereby, producing a first part of the pillar structure, thereafter; and subjecting the structure to a second plasma thereby removing a second part of the semiconductor layer thereby, producing a second part of the pillar structure.


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