The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2020

Filed:

Feb. 06, 2018
Applicant:

Zf Friedrichshafen Ag, Friedrichshafen, DE;

Inventor:

Michael Sperber, Bayreuth, DE;

Assignee:

ZF Friedrichshafen AG, Friedrichshafen, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H05K 1/11 (2006.01); H05K 5/00 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0207 (2013.01); H05K 1/0206 (2013.01); H05K 1/115 (2013.01); H05K 5/0082 (2013.01); H05K 2201/09236 (2013.01);
Abstract

A multi-layer circuit board comprising a carrier plate with an upper surface and a lower surface, and at least one electrically conductive upper inner layer located on the upper surface of the carrier plate and an electrically insulating upper intermediate layer located thereon, and an electrically conductive upper outer layer located thereon, forming the outermost layer of the upper surface. At least one electrically conductive lower inner layer is located on the lower surface of the carrier plate and an electrically insulating lower intermediate layer located thereon, and an electrically conductive lower outer layer located thereon, forming the outermost layer of the lower surface. The upper and/or lower outer layers are populated with components, and conductor paths in one of the inner layers are oriented in different directions from conductor paths in the other inner layer, and the region between the conductor paths is flooded with a voltage.


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