The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 27, 2020
Filed:
Nov. 20, 2019
Impinj, Inc., Seattle, WA (US);
John D. Hyde, Corvallis, OR (US);
Impinj, Inc., Seattle, WA (US);
Abstract
A level shifter circuit configured to convert a digital input signal with a first high logic level to a digital output signal having a second high logic level substantially higher than the first high logic level is provided. The level shifter circuit may include a PMOS latch circuit configured to receive the digital input signal and having first and second latch outputs and a current mirror circuit having a mirror input and a mirror output. The mirror input may be at least partly gated by a switch having a control input. The mirror output may be coupled to the first latch output. The control input may be coupled to the first or second latch outputs, and the digital output signal is provided from the first and/or second latch outputs.