The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2020

Filed:

Aug. 30, 2019
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventor:

Yohei Yasuda, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); H03F 3/45 (2006.01); H03K 19/0185 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
H03F 3/45219 (2013.01); G11C 7/1078 (2013.01); H03F 3/45264 (2013.01); H03F 3/45273 (2013.01); H03K 19/018528 (2013.01);
Abstract

According to one embodiment, there is provided a semiconductor device comprising a first differential amplifier circuit. The first differential amplifier circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor. The second transistor's gate and drain are connected to the first transistor. The third transistor is diode-connected through the first transistor or diode-connected without passing through the first transistor. The fourth transistor is diode-connected through the second transistor or diode-connected without passing through the second transistor. The fifth transistor forms a first current mirror circuit with the third transistor. The sixth transistor is connected to a drain of the first transistor in parallel with the third transistor and forms a second current mirror circuit with the fifth transistor.


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