The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 27, 2020
Filed:
Nov. 13, 2018
Applicant:
Vuereal Inc., Waterloo, CA;
Inventors:
Gholamreza Chaji, Waterloo, CA;
Bahareh Sadeghimakki, Kitchener, CA;
Assignee:
VueReal Inc., Waterloo, CA;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 33/62 (2010.01); H03H 3/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/05 (2013.01); H01L 24/03 (2013.01); H01L 24/08 (2013.01); H01L 24/27 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/80 (2013.01); H01L 24/83 (2013.01); H01L 33/62 (2013.01); H01L 2224/0363 (2013.01); H01L 2224/03614 (2013.01); H01L 2224/03632 (2013.01); H01L 2224/04026 (2013.01); H01L 2224/056 (2013.01); H01L 2224/05557 (2013.01); H01L 2224/05558 (2013.01); H01L 2224/08225 (2013.01); H01L 2224/27614 (2013.01); H01L 2224/27632 (2013.01); H01L 2224/29005 (2013.01); H01L 2224/29019 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/2929 (2013.01); H01L 2224/2957 (2013.01); H01L 2224/29078 (2013.01); H01L 2224/29139 (2013.01); H01L 2224/29193 (2013.01); H01L 2224/29339 (2013.01); H01L 2224/29355 (2013.01); H01L 2224/29386 (2013.01); H01L 2224/29393 (2013.01); H01L 2224/29439 (2013.01); H01L 2224/29499 (2013.01); H01L 2224/29609 (2013.01); H01L 2224/29611 (2013.01); H01L 2224/29639 (2013.01); H01L 2224/32227 (2013.01); H01L 2224/80805 (2013.01); H01L 2224/80897 (2013.01); H01L 2224/83193 (2013.01); H01L 2224/83897 (2013.01); H03H 3/00 (2013.01);
Abstract
This disclosure is related to integrating optoelectronics microdevices into a system substrate for efficient and durable electrical bonding between two substrates at low temperature. 2D nanostructures and 3D scaffolds may create interlocking structures for improved bonding properties. Addition of nanoparticles into the structure creates high surface area for better conduction. Application of curing agents before or after alignment of micro devices and receiving substrates further assists with formation of strong bonds.