Cage-shielded interposer inductances

Abstract

Disclosed microelectronic assemblies employ an integrated interposer cage to reduce electromagnetic interference with (and from) high-frequency components. One illustrative embodiment includes: at least one IC die having drive cores for a plurality of oscillators, the IC die attached in a flip-chip configuration to a (interposer) substrate, the substrate having: multiple inductors electrically coupled to said drive cores and each enclosed within a corresponding conductive cage integrated into the substrate to reduce mutual coupling between the inductors and noise coupled through substrate. An illustrative interposer embodiment includes: upper contacts arranged to electrically connect with micro bumps on at least one IC die; metallization and dielectric layers that form multiple inductors each surrounded by bars of a conductive cage; lower contacts arranged to electrically connect with bumps on a package substrate; and a substrate with a plurality of TSVs (through-silicon vias) that electrically couple to the lower contacts. Each of the bars includes: at least one of said TSVs, at least one via through the metallization and dielectric layers, and at least one upper contact.