The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10818481 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 27, 2020

Filed:

Jul. 20, 2016
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Jennifer Sun, Mountain View, CA (US);

Yikai Chen, Santa Clara, CA (US);

Biraja Kanungo, San Jose, CA (US);

Vahid Firouzdor, San Mateo, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01J 37/32 (2006.01); H05B 3/26 (2006.01); C23C 4/01 (2016.01); C23C 4/134 (2016.01); H05B 1/02 (2006.01); H01L 21/67 (2006.01);
U.S. Cl.
CPC ...
H01J 37/32935 (2013.01); C23C 4/01 (2016.01); C23C 4/134 (2016.01); H01J 37/32495 (2013.01); H01J 37/32522 (2013.01); H01J 37/32724 (2013.01); H01L 21/67069 (2013.01); H05B 1/0233 (2013.01); H05B 3/265 (2013.01); H01J 2237/244 (2013.01); H01J 2237/332 (2013.01); H01J 2237/334 (2013.01); H05B 2203/013 (2013.01);
Abstract

Embodiments involve smart device fabrication for semiconductor processing tools via precision patterning. In one embodiment, a method of manufacturing a semiconductor processing tool component includes providing a substrate of the semiconductor processing tool component, patterning the substrate to form a sensor directly on the substrate, and depositing a top layer over the sensor. The sensor may include, for example, a temperature or strain sensor. The method can also include patterning the substrate to form one or more of: heaters, thermistors, and electrodes on the substrate. In one embodiment, the method involves patterning a surface of the component oriented towards a plasma region inside of the semiconductor processing tool.


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