Nonvolatile memory device, operation method of the nonvolatile memory device, and operation method of memory controller controlling the nonvolatile memory device

Abstract

A nonvolatile memory device includes a control logic circuit that receives a read command from outside the nonvolatile memory device, a memory cell array which includes a plurality of memory cells connected to a plurality of word lines, an address generator that generates a plurality of addresses based on read information from the outside of the nonvolatile memory device, an address decoder sequentially selects a plurality of pages in at least one word line, which correspond to the plurality of addresses, a page buffer circuit that is connected to the memory cell array through a plurality of bit lines, and prepares a plurality of sequential data from memory cells connected to the selected pages by the address decoder, and an input/output circuit that continuously outputs the plurality of sequential data from the page buffer circuit to the outside of the nonvolatile memory device through data lines.