The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2020

Filed:

Apr. 28, 2017
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Olivier Giroux, Santa Clara, CA (US);

Peter Nelson, San Francisco, CA (US);

Jack Choquette, Palo Alto, CA (US);

Ajay Sudarshan Tirumala, Cupertino, CA (US);

Assignee:

NVIDIA Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 9/46 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3009 (2013.01); G06F 9/3851 (2013.01); G06F 9/46 (2013.01);
Abstract

A streaming multiprocessor (SM) includes a nanosleep (NS) unit configured to cause individual threads executing on the SM to sleep for a programmer-specified interval of time. For a given thread, the NS unit parses a NANOSLEEP instruction and extracts a sleep time. The NS unit then maps the sleep time to a single bit of a timer and causes the thread to sleep. When the timer bit changes, the sleep time expires, and the NS unit awakens the thread. The thread may then continue executing. The SM also includes a nanotrap (NT) unit configured to issue traps using a similar timing mechanism to that described above. For a given thread, the NT unit parses a NANOTRAP instruction and extracts a trap time. The NT unit then maps the trap time to a single bit of a timer. When the timer bit changes, the NT unit issues a trap.


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