The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2020

Filed:

Dec. 29, 2017
Applicant:

Realtek Semiconductor Corporation, Hsinchu, TW;

Inventors:

Tsung-Yeh He, Kaohsiung, TW;

Hsu-Jung Tung, Hsinchu County, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G06F 1/04 (2006.01); G01R 25/00 (2006.01); G09G 5/00 (2006.01);
U.S. Cl.
CPC ...
G01R 31/282 (2013.01); G01R 25/005 (2013.01); G06F 1/04 (2013.01); G09G 5/008 (2013.01);
Abstract

A sampling clock testing circuit includes a clock circuit, a processing circuit and a phase determining circuit. The clock circuit generates a clock signal and switches phases of the clock signal according to a horizontal synchronous signal. The processing circuit samples a data signal according to the clock signal with the phases to generate pixel data groups each of which is corresponding to one phase. The phase determining circuit generates calculated values according to the pixel data groups, in which each phase is corresponding to one calculated value. The phase determining circuit selects a specific calculated value from the calculated values according to a predetermined condition, and determines a specific phase corresponding to the specific calculated value. The processing circuit samples a subsequent data signal according to the clock signal switched to the specific phase to generate subsequent pixel data.


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