The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2020

Filed:

Dec. 14, 2018
Applicant:

Dell Products L.p., Round Rock, TX (US);

Inventors:

Pei-Yang Weng, Chiayi County, TW;

Chun-Lin Liao, Taipei, TW;

Bhyrav Murthy Mutnury, Austin, TX (US);

Assignee:

Dell Products L.P., Round Rock, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H05K 3/00 (2006.01); G06F 30/392 (2020.01); G06F 30/394 (2020.01); G06F 30/398 (2020.01); G06F 119/10 (2020.01);
U.S. Cl.
CPC ...
H05K 1/0228 (2013.01); G06F 30/392 (2020.01); G06F 30/394 (2020.01); G06F 30/398 (2020.01); H05K 3/0005 (2013.01); G06F 2119/10 (2020.01);
Abstract

Traces on a PCB can be spaced closer together than in conventional layouts, which previously required the pair-to-pair spacing for the high-speed differential stripline signals to be at least 5H if the signals are originating from the same source and 7H when the signals on two pairs of transmission lines in the traces originate from different sources. Traces may be spaced closer together when, for example, a ratio of the core height to the prepreg height of the printed circuit board is approximately equal to one. Traces may be spaced closer together when, for example, a ratio of the trace spacing distance to the core height distance is less than approximately one. By implementing one or both of these design rules, printed circuit board layouts can be designed, and printed circuit boards manufactured from those designs, that have an intra-group spacing between the first pair and the second pair measured at a point at which the first pair is closest to the second pair of less than approximately five times the prepreg height (the limit for previous printed circuit board designs).


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