The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2020

Filed:

Nov. 12, 2019
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza (MB), IT;

Inventors:

Giorgio Mussi, Melzo, IT;

Giacomo Langfelder, Milan, IT;

Carlo Valzasina, Gessate, IT;

Gabriele Gattere, Castronno, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza (MB), IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/099 (2006.01); H03K 3/353 (2006.01); H03K 5/00 (2006.01); H03L 7/18 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0992 (2013.01); H03K 3/353 (2013.01); H03K 5/00006 (2013.01); H03L 7/18 (2013.01);
Abstract

In an embodiment, a clock generator has a variable-modulus frequency divider that receives a high-frequency clock signal and outputs a divided clock signal having a frequency controlled by a modulus-control signal generated by a temperature-compensation circuit. A jitter filter is coupled to the output of the variable-modulus frequency divider and to the temperature-compensation circuit and generates a compensated clock signal having switching edges that are delayed, with respect to the divided clock signal, by a time correlated to a quantization-error signal.


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