The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 20, 2020
Filed:
Jul. 03, 2018
Csmc Technologies Fab2 Co., Ltd., Wuxi New District, Jiangsu, CN;
Huajun Jin, Jiangsu, CN;
Guipeng Sun, Jiangsu, CN;
CSMC TECHNOLOGIES FAB2 CO., LTD., Wuxi New District, Jiangsu, CN;
Abstract
A method for manufacturing a semiconductor device, includes: forming a well region () in a semiconductor substrate () and forming a channel region () in the well region (), and forming a gate oxide layer () and a polysilicon layer () on the well region (); etching a portion of the gate oxide layer () and the polysilicon layer (), and exposing a first opening () used for forming a source region and a second opening () used for forming a drain region; forming a first dielectric layer () and a second dielectric layer () on the polysilicon layer () and in the first opening () and the second opening () successively, and forming a source region side wall at a side surface of the first opening () and forming a drain region side wall at a side surface of the second opening (); forming a dielectric oxide layer () on the polysilicon layer (), etching the dielectric oxide layer and retaining the dielectric oxide layer () located on the drain region side wall; removing the second dielectric layer () in the source region side wall and retaining the first dielectric layer () therein.